http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2008144460-A1

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filingDate 2008-05-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c45c4da45aa624b28070b7ff3cd00d76
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publicationDate 2008-11-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber WO-2008144460-A1
titleOfInvention Multi layer low cost cavity substrate fabrication for pop packages
abstract In a method and system for fabricating a semiconductor device (100) having a package-on-package structure, a base laminate substrate (BLS) (110) is formed to include a base center portion (112) and a peripheral portion (114) separated by a barrier element (120). The barrier element forms a peripheral wall to surround the base center portion. A frame shaped top laminate substrate (TLS) (130) is disposed over the peripheral portion of the BLS. The TLS has an open top center portion (132) matching the base center portion surrounded by the peripheral wall to form a cavity (140). A plurality of conductive bumps (150) each disposed between a top contact pad (134) of the TLS and a base contact pad (116) of the peripheral portion of the BLS are formed to provide electrical and mechanical coupling therebetween. The barrier element forms a seal between the cavity and the plurality of conductive bumps.
priorityDate 2007-05-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 44.