http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2008137458-A2

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filingDate 2008-04-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0f4b24d72c5efc68edc3d7a854f7642a
publicationDate 2008-11-13-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber WO-2008137458-A2
titleOfInvention Generating test sequences for testing circuit channels
abstract Disclosed herein are exemplary methods, apparatus, and systems for generating test sequences that can be used to evaluate high-speed circuit pathways. The disclosed methods, apparatus, and systems can be used, for example, in a printed circuit board or integrated circuit design flow to analyze signal integrity or other electrical behavior. For example, in one exemplary embodiment, a sequence of code words to be input on a circuit channel is determined in a nonrandom manner. In this embodiment, the sequence of code words complies with a transmission code (for example, the 8b 10b transmission code) and is designed to cause the output voltage of the channel to be reduced during a time period in which the channel outputs a logic high value. Also disclosed are embodiments of methods, apparatus, and systems for generating test sequences for circuit pathways that exhibit duty- cycle distortion (e.g., clock-related duty-cycle distortion or data-dependent duty- cycle distortion).
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-111007314-A
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priorityDate 2007-05-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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