http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2007006013-A2

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filingDate 2006-07-05-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2c9602d758344a38091fbacfb0c14665
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publicationDate 2007-01-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber WO-2007006013-A2
titleOfInvention Synchronized high-assurance circuits
abstract A high-assurance system for processing information is disclosed. The high-assurance system comprising first and second processors, a task matching circuit, and first and second outputs. The task matching circuit configured to determine a software routine is ready for execution on the first processor, and delay the first processor until the second processor is ready to execute the software routine. The first output of the first processor configured to produce a first result with the software routine. The second output of the second processor configured to produce a second result with the software routine, where the first result is identical to the second result.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-3486780-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-105373455-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-3065054-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-105373455-B
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10394644-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10528077-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10599513-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9823957-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8527741-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2016032867-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8190877-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-7290410-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10241958-B2
priorityDate 2005-07-05-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 40.