| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_294881271413951a95f284b588a68e66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6103a851159f869198067e73c705c5e1
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0755de4a54154717577e2db6f6ce8de4
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_8a4bdeef27cfc097912dee886eb07755 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M13-1137
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M13-1168
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M13-19
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M13-6566
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M13-116
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M13-1114
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M13-11
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M13-6505 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M13-19 |
| filingDate |
2006-04-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e00a24474a8b584a4b0e7aea73f09b95
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_54bdaa88a9b5a766076bb1ed12ac4754
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bfaaf14b355d3fccb06d82bbec0efb36 |
| publicationDate |
2006-11-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
WO-2006115164-A1 |
| titleOfInvention |
Decoding apparatus and decoding method |
| abstract |
A decoding apparatus and a decoding method wherein the decoding of LDPC codes can be accurately performed, while the apparatus scale can be suppressed. A calculating part (1102) uses a decoding in-progress result (D1101) received from a decoding in-progress result storage memory (1104) via a cyclic shift circuit (1101) to perform a first computation corresponding to three check node computations, and causes a decoding in-progress result storage memory (1103) to store a decoding in-progress result (D1102) from the first computation. A calculating part (415) uses a decoding in-progress result (D414) received from the decoding in-progress result storage memory (1103) via the cyclic shift circuit to perform a second computation corresponding to six variable node computations, and causes a decoding in-progress result storage memory (1104) to store a decoding in-progress result (D415) from the second computation. This invention can be applied to, for example, a turner for receiving satellite broadcasts. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-2051386-A3
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-2088679-A3
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-101615913-B
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2012216889-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8281205-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2006304131-A |
| priorityDate |
2005-04-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |