http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2005091301-A1

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_91518a856290833cf23acb8d4e0c895f
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filingDate 2004-03-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bbe45ee5828b5233bf22f46dd51697ba
publicationDate 2005-09-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber WO-2005091301-A1
titleOfInvention Ferroelectric memory
abstract In order to charge a pair of ferroelectric capacitors FC1 and FC2 constituting a memory cell MC in read operation, a voltage setting circuit PRE sets the difference between voltages across the ferroelectric capacitors FC1 and FC2 lower than a coersive voltage. A differential sense amplifier SA amplifies the voltage difference between bit lines BL and BLX being produced depending on the difference of charging amount between the ferroelectric capacitors FC1 and FC2. Since the difference between voltages across the ferroelectric capacitors FC1 and FC2 is lower than the coersive voltage, inversion of polarization vector of the ferroelectric capacitors FC1 and FC2 is prevented. Consequently, it is possible to prevent deterioration of a ferroelectric material due to read operation and eliminate restriction on the number of reading times of a ferroelectric memory.
priorityDate 2004-03-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 19.