http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2005008998-A1

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filingDate 2004-07-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0a2a5b9512cdd7dcb4a640074d592e36
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publicationDate 2005-01-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber WO-2005008998-A1
titleOfInvention Initialization vector generation algorithm and hardware architecture
abstract An apparatus provides an integrated single chip solution to solve a multitude of WLAN problems, and especially Switching/Bridging, and Security. In accordance with another aspect of the invention, the apparatus is able to terminate secured tunneled 802.11i, IPSec and L2TP with IPSec traffic. In accordance with a further aspect of the invention, the apparatus is also able to handle computation-intensive security-based algorithms including per packet Initialization Vector generation without significant reduction in traffic throughput. The architecture is such that it not only resolves the problems pertinent to WLAN it is also scalable and useful for building a number of useful networking products that fulfill enterprise security and all possible combinations of wired and wireless networking needs.
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priorityDate 2003-07-03-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 32.