http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-0237565-A2
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1f8263465dce102132e826ccb5ebf2a2 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_07d47fe058c8c489e8123e2a9b7bd52d http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_3d7f502d2b8c5ca937263c2cb777ecd4 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_112f6f9013adb2f2285dd98556b01b3e http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_a18e51d363a5b827c2ae4e955e5897b2 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-09701 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-49827 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-498 |
| filingDate | 2001-11-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1271d2fbc1c48103397c6925c9e4d150 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6d0ab1cad22f8a5bd59ddc136c589910 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a44ab68e8c7707c7b9c2ec4a8bd4977c http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_913ad2a975a4f70199a1cb2a7242ad59 |
| publicationDate | 2002-05-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | WO-0237565-A2 |
| titleOfInvention | Method of connecting conductors on different levels of a microelectronic device and associated apparatus |
| abstract | A method of electrically connecting conductors on different levels of a microelectronic device is provided. A dielectric layer is deposited over a first metallic layer and a via is then formed in the dielectric layer extending through the dielectric layer. A via metal is then deposited in the via such that the via is in electrical contact with the first metallic layer. A second metallic layer is then deposited over the via metal such that the second metallic layer is in electrical contact with the via metal. The via metal thereby forms an electrical connection between the first metallic layer and the second metallic layer on opposing surfaces of the dielectric layer. The dielectric layer thereby forms a stencil for deposition of the via metal and an interlevel dielectric separating the first metallic layer from the second metallic layer, while also functioning as a structural substrate for the microelectronic device. A method according to the present invention is useful, for example, to connect a fine pitch conductor on one side of the dielectric layer to a coarse pitch conductor on the opposing side. An associated apparatus is also provided which may also include a microelectronic circuit electrically connected to at least one of the first metallic layer and the second metallic layer. |
| priorityDate | 2000-11-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 39.