| abstract |
A damascene process for introducing copper into metallization layers in microelectronic structures includes a step of forming an enhancement layer (24) of a metal alloy, such as a copper alloy or Co-W-P, over the barrier layer (16), using PVD, CVD or electrochemical deposition prior to electrochemically depositing copper metallization. The enhancement layer (24) has a thickness from 101 to 1001 and conformally covers the discontinuities, seams and grain boundary defects in the barrier layer. The enhancement layer provides a conductive surface onto which a metal layer, such as copper metallization, may be applied with electrochemical deposition. Alternatively, a seed layer (28) may be deposited over the enhancement layer prior to copper metallization. |