| abstract |
A method for improving the conformality and optimizing step coverage in semiconductor features (200) such as vias (200) and trenches is described herein. By performing an additional sputtering step after at least part of the metal (250) has been deposited on a wafer feature, undesirably thick metal. deposits near the top and at the bottom of a feature (200) can be reduced. By reducing the overhang at the top of a feature (200) such as a via (200), it is easier for metal species to reach and be deposited on the sidewalls. By reducing the thickness of deposited metal at the bottom of a via (200), via (200) resistance can be decreased. The extra sputtering step may be performed a single time after all metal has been deposited. Alternatively, a small amount of metal may be deposited, a sputtering step may be performed, more metal may be deposited, and additional sputtering steps can be performed. |