http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-0148814-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b7317808024e524eea40a6c5a5ad6a22 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76283 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76264 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8222 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-331 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-76 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-762 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-732 |
| filingDate | 2000-12-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ba3ea519b3f1624783bb14acf698da16 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b0a34f729ab663de44394fb1608ca11c http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_12ba77d2a81aa3025ab457fa3836d81b http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f937fbfa46415b5a421a395a377808f5 |
| publicationDate | 2001-07-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | WO-0148814-A1 |
| titleOfInvention | Method of manufacturing a semiconductor device comprising semiconductor elements formed in a top layer of a silicon wafer situated on a buried insulating layer |
| abstract | A method of manufacturing a semiconductor device comprising semiconductor elements having semiconductor zones (17, 18, 24, 44, 45) formed in a top layer (4) of a silicon wafer (1) situated on a buried insulating layer (2). In this method, a first series of process steps are carried out, commonly referred to as front-end processing, wherein, inter alia, the silicon wafer is heated to temperatures above 700 °C. Subsequently, trenches (25) are formed in the top layer, which extend as far as the buried insulating layer and do not intersect pn-junctions. After said trenches have been filled with insulating material (26, 29), the semiconductor device is completed in a second series of process steps, commonly referred to as back-end processing, wherein the temperature of the wafer does not exceed 400 °C. The trenches are filled in a deposition process wherein the wafer is heated to a temperature which does not exceed 500 °C. In this manner, a semiconductor device can be made comprising semiconductor elements having very small and shallow semiconductor zones. |
| priorityDate | 1999-12-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 34.