| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_fdad00677b9268c26e005a9e03a7b9dd |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-13
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-456
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-13091
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-00012
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48247
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-0603
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-49175
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-181
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-49111 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7813 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-45 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01M2-34
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-76 |
| filingDate |
2016-06-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2019-03-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8771d2adf3467b65bd9c0688bb170783
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d434e2315826c31ecf72b0a663e5b61a |
| publicationDate |
2019-03-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-RE47292-E |
| titleOfInvention |
MOS semiconductor device |
| abstract |
The semiconductor device according to an aspect of the present invention includes: a semiconductor substrate of a first conductive type; a first semiconductor layer of the first conductive type formed on the main surface of the semiconductor substrate, the impurity concentration of the first semiconductor layer being lower than that of the semiconductor substrate; a second and third semiconductor layers of a second conductive type formed on the first semiconductor layer, the second and third semiconductor layers being isolated from each other; a first and second MOS transistors MOS 1 and MOS 2 of the first conductive type formed in the second and third semiconductor layers, the first semiconductor layer and the semiconductor substrate serving as drains of the first and second MOS transistors; and a conductive layer. |
| priorityDate |
2001-09-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |