Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2300-0413 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2230-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2300-0404 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0286 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3266 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0205 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0291 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0278 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G5-18 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3696 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K3-356026 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C19-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3648 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3677 |
classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-3266 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K3-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K3-356 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F1-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G5-18 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C19-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-36 |
filingDate |
2016-10-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2018-05-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d4d9be286624dc55ccecf0a4f6e26e04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7fa2f1cf002f782d6fbf62e9b457795a |
publicationDate |
2018-05-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-9978329-B2 |
titleOfInvention |
Pulse generation circuit and semiconductor device |
abstract |
Two gate drivers each comprising a shift register and a demultiplexer including single conductivity type transistors are provided on left and right sides of a pixel portion. Gate lines are alternately connected to the left-side and right-side gate drivers in every M rows. The shift register includes k first unit circuits connected in cascade. The demultiplexer includes k second unit circuits to each of which a signal is input from the first unit circuit and to each of which M gate lines are connected. The second unit circuit selects one or more wirings which output an input signal from the first unit circuit among M gate lines, and outputs the signal from the first unit circuit to the selected wiring(s). Since gate signals can be output from an output of a one-stage shift register to the M gate lines, the width of the shift register can be narrowed. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11361726-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10629149-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11151944-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11715438-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11749365-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11626082-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11355082-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2022005536-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11308910-B2 |
priorityDate |
2013-04-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |