http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9911779-B2

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_294881271413951a95f284b588a68e66
classificationCPCAdditional http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-08121
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-80357
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-80896
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-80895
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-80194
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14645
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-08137
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14634
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1464
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14636
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14623
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14625
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14685
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1461
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1469
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L31-062
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-146
filingDate 2016-11-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2018-03-06-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6207b1cbd403b15597fc82bfd4bcf9ea
publicationDate 2018-03-06-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-9911779-B2
titleOfInvention Solid-state imaging device, manufacturing method thereof, and electronic apparatus
abstract Disclosed herein is a solid-state imaging device including: a laminated semiconductor chip configured to be obtained by bonding two or more semiconductor chip sections to each other and be obtained by bonding at least a first semiconductor chip section in which a pixel array and a multilayer wiring layer are formed and a second semiconductor chip section in which a logic circuit and a multilayer wiring layer are formed to each other in such a manner that the multilayer wiring layers are opposed to each other and are electrically connected to each other; and a light blocking layer configured to be formed by an electrically-conductive film of the same layer as a layer of a connected interconnect of one or both of the first and second semiconductor chip sections near bonding between the first and second semiconductor chip sections. The solid-state imaging device is a back-illuminated solid-state imaging device.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10622399-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10121814-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2018166493-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11239273-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11626439-B2
priorityDate 2011-02-08-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

Predicate Subject
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9171875-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2009305499-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2006129762-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8669602-B2
isDiscussedBy http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID69667
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID425270609

Total number of triples: 38.