| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_82a9e22a923eca64a02a97f0dfb493ed |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-456 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28052
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28518
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-93
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66174
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4933
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-456
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66189 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-285
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-45
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-49
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-93 |
| filingDate |
2017-02-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2018-01-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8a514d1618c8d92b91b6cdd14115b147
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6cc4e506f771e63168101bbb64936d35
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a83b9a638f56f119a1b6b2615d04697e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f697b3938c77a25dd44147f4bffd7f17
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9df316072d9cc2b91ff4fd80d9dbfdc8 |
| publicationDate |
2018-01-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-9882066-B1 |
| titleOfInvention |
Transcap manufacturing techniques without a silicide-blocking mask |
| abstract |
Certain aspects of the present disclosure provide a semiconductor variable capacitor. The semiconductor variable capacitor generally includes a first non-insulative region disposed above a semiconductor region, and a second non-insulative region disposed adjacent to the semiconductor region. In certain aspects, the semiconductor variable capacitor also includes a first silicide layer disposed above the second non-insulative region, wherein the first silicide layer overlaps at least a portion of the semiconductor region. In certain aspects, a control region may be disposed adjacent to the semiconductor region such that a capacitance between the first non-insulative region and the second non-insulative region is configured to be adjusted by varying a control voltage applied to the control region. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10580908-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10181533-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10211347-B2 |
| priorityDate |
2017-02-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |