http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9865639-B2
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_294881271413951a95f284b588a68e66 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-94 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-13091 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-9202 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-83 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-00 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76898 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14636 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-48 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-44 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-146 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-14 |
| filingDate | 2016-03-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2018-01-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f28f75d7a9cfc6aace5eb97af7c4a00e http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_10e9e39cea6eaf424b3c7ba9c8a7ea85 |
| publicationDate | 2018-01-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | US-9865639-B2 |
| titleOfInvention | Semiconductor device and semiconductor-device manufacturing method |
| abstract | It is possible to reduce resistance variations of a member connecting a through-silicon via to a line and improve wiring reliability. A hole through which the through-silicon via is to be stretched is created and an over-etching process is carried out on a wiring layer including the line. Then, by embedding copper in the hole, the through-silicon via made of the copper can be created. After the through-silicon via has been connected to the line made of aluminum through the member which is a connection area, the connection area is alloyed in a thermal treatment in order to electrically connect the through-silicon via to the line. Thus, it is possible to reduce variations of a resistance between the through-silicon via and the line and also improve wiring reliability as well. The present technology can be applied to a semiconductor device and a method for manufacturing the semiconductor device. |
| priorityDate | 2011-09-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 38.