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Object |
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| classificationIPCAdditional |
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| filingDate |
2016-08-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2017-11-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_abe582736161991a60fe2c4aa0653e41
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f5b3c3349304838e08f441e4a859ff49 |
| publicationDate |
2017-11-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-9825124-B2 |
| titleOfInvention |
Power device integration on a common substrate |
| abstract |
A semiconductor structure for facilitating an integration of power devices on a common substrate includes a first insulating layer formed on the substrate and an active region having a first conductivity type formed on at least a portion of the first insulating layer. A first terminal is formed on an upper surface of the structure and electrically connects with at least one other region having the first conductivity type formed in the active region. A buried well having a second conductivity type is formed in the active region and is coupled with a second terminal formed on the upper surface of the structure. The buried well and the active region form a clamping diode which positions a breakdown avalanche region between the buried well and the first terminal. A breakdown voltage of at least one of the power devices is a function of characteristics of the buried well. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10707345-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11024733-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10770391-B2 |
| priorityDate |
2012-07-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |