Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_8ff538ed094988386084565bc7f62aeb |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4125 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4916 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C14-0063 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-418 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1104 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823462 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B10-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-513 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-045 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-08 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-412 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-51 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-49 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C14-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-418 |
filingDate |
2016-08-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2017-10-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_87c23c64199c728619466c46e13367ff http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_05171e3fc36e1704b0b9e32dd9751506 |
publicationDate |
2017-10-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-9780098-B2 |
titleOfInvention |
Integrated structure comprising neighboring transistors |
abstract |
An integrated structure includes a first MOS transistor with a first controllable gate region overlying a first gate dielectric and a second MOS transistor neighboring the first MOS transistor and having a second controllable gate region overlying the first gate dielectric. A common conductive region overlies the first and second gate regions and is separated therefrom by a second gate dielectric. The common conductive region includes a continuous element located over a portion of the first and second gate regions and a branch extending downward from the continuous element toward the substrate as far as the first gate dielectric. The branch located between the first and second gate regions. |
priorityDate |
2014-03-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |