| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_459ed213007307f4e4bee9a68a346ca7 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0243
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76843
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02488
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-30625
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02532
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0262 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-481
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76831
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76873
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76898
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76802 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-306
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-30
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-48 |
| filingDate |
2015-05-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2017-03-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_264eed9c6a49e0f7b2432ff10bd69229
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d5ed8b094dde9b586e69b39b73232693 |
| publicationDate |
2017-03-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-9607895-B2 |
| titleOfInvention |
Silicon via with amorphous silicon layer and fabrication method thereof |
| abstract |
A method is provided for fabricating a semiconductor structure. The method includes providing a substrate having an upper surface and a bottom surface; and forming a deep hole in the substrate from the upper surface. The method also includes forming an amorphous silicon layer on a side surface and a bottom surface of the deep hole to promote a preferred crystal orientation in subsequently formed layers. Further, the method includes forming a barrier layer having a preferred orientation along the (111) crystal face on the barrier layer. Further, the method also includes forming a metal layer having a preferred orientation along the (111) crystal face on the barrier layer to fill the through hole. |
| priorityDate |
2014-07-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |