| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c16d2144a81bfa32a665dca1e93c3d37 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2013-0054
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-1673
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2213-71
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2213-77 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4091
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-1673
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-1659
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C13-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-5607
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-5678
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-5685
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C13-0061
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C13-004 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-16 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C13-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-56 |
| filingDate |
2015-07-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2017-01-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_93ded323c2b9623144747b685b4ac931
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_86d552c228d08e1761434b4a806b7889
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6940ee98fd7fad5d59bf1237672e2770
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ccedc8a9d022e284e45b974cbe94fefd |
| publicationDate |
2017-01-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-9536605-B2 |
| titleOfInvention |
Resistive memory device and operating method |
| abstract |
Provided are a resistive memory device including a plurality of memory cells, and a method of operating the resistive memory device. The resistive memory device includes a sensing circuit connected to a first signal line, to which a memory cell is connected, the sensing circuit sensing data stored in the memory cell based on a first reference current; and a reference time generator for generating a reference time signal that determines a time point when a result of the sensing is to be output, based on the first reference current. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2019088319-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10490271-B2 |
| priorityDate |
2014-10-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |