Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_7a4ba732e996ccb96709867320c92feb |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05096 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05124 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5283 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-528 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05025 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-522 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-04042 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05624 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-05 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-00014 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05085 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5226 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5286 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-05 |
classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-00 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-48 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-528 |
filingDate |
2014-01-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2016-09-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9e179a82217f2280dbec027fcfcb61da http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d1c9779fdad2e5081f9fe62b6da18763 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a3372aa4a79ac1b04e4f139ba3135d92 |
publicationDate |
2016-09-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-9455226-B2 |
titleOfInvention |
Semiconductor device allowing metal layer routing formed directly under metal pad |
abstract |
The present invention provides a semiconductor device. The semiconductor device comprises: a metal pad and a first specific metal layer routing. The metal pad is positioned on a first metal layer of the semiconductor device. The first specific metal layer routing is formed on a second metal layer of the semiconductor device, and directly under the metal pad. |
priorityDate |
2013-02-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |