Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6af9a57049d2d91c036d4f5ab49154cb |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7317 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66265 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66242 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0649 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-735 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-737 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6625 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0821 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1008 |
classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-73 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-737 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-735 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-10 |
filingDate |
2015-04-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2016-07-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c4ee6ba082daf06cbf9d5363bb755884 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_aafe30e723e38ce9f50f7e4de11b3843 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3c455e92fe60bc4dc0f749255be1286c http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_299c77acffe6dec2d9526f9587caff4a |
publicationDate |
2016-07-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-9397203-B2 |
titleOfInvention |
Lateral silicon-on-insulator bipolar junction transistor process and structure |
abstract |
Device structures, fabrication methods, and design structures for a bipolar junction transistor. A first terminal of the bipolar junction transistor is formed from a section of a device layer of a semiconductor-on-insulator wafer. An intrinsic base of the bipolar junction transistor is formed from an epitaxially-grown section of a first semiconductor layer, which is coextensive with a sidewall of the section of the device layer. A second terminal of the bipolar junction transistor is formed from a second semiconductor layer that is coextensive with the epitaxially-grown section of the first semiconductor layer. The epitaxially-grown section of a first semiconductor layer defines a first junction with the section of the device layer, and the second semiconductor layer defines a second junction with the epitaxially-grown section of the first semiconductor layer. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11152496-B2 |
priorityDate |
2014-01-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |