| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_a04ec82c01a5765a0fb9c6c0d8a9abba |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42392
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0207
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823885
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42316
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B82Y10-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0676
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823807
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0673
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-092
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F30-392
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B10-12
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-775
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823871
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78696
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F17-5072 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F17-50 |
| filingDate |
2014-06-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2016-06-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2cb795a2828ffab2eab10c09fea45669
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e32ab1a58a4593593ed136dd184ab07c |
| publicationDate |
2016-06-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-9378320-B2 |
| titleOfInvention |
Array with intercell conductors including nanowires or 2D material strips |
| abstract |
An integrated circuit design tool includes a cell library. The cell library includes entries for a plurality of cells, entries in the cell library including specifications of particular cells in a computer executable language. At least one entry in the cell library can comprise a specification of physical structures and timing parameters of an array of circuit cells, the circuit cells including one or more transistors and a cell interconnect terminal; and a conductor configured to connect interconnect terminals of a plurality of the circuit cells in the array, the conductor comprising one or more nanowires or 2D material strips arranged in parallel. An integrated circuit including the array of circuit cells is described. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11616020-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2016284704-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9691768-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2015370948-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10037397-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10256223-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2015370947-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11114381-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10312229-B2 |
| priorityDate |
2014-06-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |