| abstract |
A memory cell having a kinked polysilicon layer structure, or a polysilicon layer structure with a top portion being narrower than a bottom portion, may greatly reduce random single bit (RSB) failures and may improve high density plasma (HDP) oxide layer fill-in by reducing defects caused by various impurities and/or a polysilicon layer short path. A kinked polysilicon layer structure may also be applied to floating gate memory cells either at the floating gate structure or the control gate structure. |