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filingDate 2013-11-15-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2015-08-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_82ec724c773f352bdea7f41c8e9ba89b
publicationDate 2015-08-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-9106236-B2
titleOfInvention Spread-spectrum phase locked loop circuit and method
abstract A phase locked loop (PLL) circuit and a method thereof are provided. In an embodiment, the PLL circuit includes: a switched capacitor circuit, in which the switched capacitor circuit generates a modulation waveform, and the modulation waveform is injected into the PLL circuit in a current form, so that a PLL output frequency is modulated. Compared with the spread spectrum phase locked loop (SS-PLL) in the prior art, the SS-PLL in embodiments of the present invention is simple in structure, low in power consumption, low in silicon overhead, and flexible both in spreading factor and modulation frequency.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I733472-B
priorityDate 2013-08-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 30.