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filingDate 2010-06-09-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 2015-07-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-9086973-B2
titleOfInvention System and method for a cache in a multi-core processor
abstract The invention relates to a multi-core processor system, in particular a single-package multi-core processor system, comprising at least two processor cores, preferably at least four processor cores, each of said at least two cores, preferably at least four processor cores, having a local LEVEL-1 cache, a tree communication structure combining the multiple LEVEL-1 caches, the tree having at least one node, preferably at least three nodes for a four processor core multi-core processor, and TAG information is associated to data managed within the tree, usable in the treatment of the data.
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