Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e757fd4fedc4fe825bb81b1b466a0947 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_2b2b3f450622360614a4764733108476 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_72b9b86071d23ccc7d44d73b7b5551e6 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_092f40dd4be949a7c908ee7672b23e20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_39640cb8cdff4aa3b4aa8554a6e5ba24 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823437 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-49 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823828 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823481 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 |
classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-49 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 |
filingDate |
2012-08-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2015-06-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5deae41824ebc09e0ce38990488a4402 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f5d633d8753abfcdeba01a19a9476170 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_56ebba88f1d0e7dd23835a148dc64ecf http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e21d12d19a9cc07e2e6b9abff35fcc71 |
publicationDate |
2015-06-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-9059308-B2 |
titleOfInvention |
Method of manufacturing dummy gates of a different material as insulation between adjacent devices |
abstract |
Embodiments of the present invention include a semiconductor structure including two transistor structures separated by a dummy gate of a different material and methods for forming said structure. Embodiments including forming sacrificial gates on a semiconductor substrate, forming spacers on the sacrificial gates, forming source/drain regions adjacent to two sacrificial gates separated by a third sacrificial gate, and replacing the third sacrificial gate with an insulating material. The insulating material replacing the third sacrificial gate may serve as a dummy gate to electrically isolate nearby source/drain regions. Embodiments further include forming sacrificial gates on a semiconductor substrate, forming spacers on the sacrificial gates, forming source/drain regions adjacent to two sacrificial gates separated by a third sacrificial gate, and replacing the two sacrificial gates with metal gates while leaving the third sacrificial gate in place to serve as a dummy gate. |
priorityDate |
2012-08-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |