| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_01e2ab3dd6754692085afd797caebbd0
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_dd0d46723cec47e70734cd46de4c1d4d |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L2209-12
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L2209-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F2221-2129 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F21-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F21-31
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-31719
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F21-73
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-317
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L9-0861
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09C1-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06K19-077
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L9-3278 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F21-31
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F21-73
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04L9-08
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F21-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-317 |
| filingDate |
2011-01-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2014-10-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bff4c81ed32c1006c2e6ac174daa5917 |
| publicationDate |
2014-10-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-8867739-B2 |
| titleOfInvention |
Integrated silicon circuit comprising a physicallly non-reproducible function, and method and system for testing such a circuit |
| abstract |
A silicon integrated circuit includes a physically non-copyable function LPUF that generates a signature specific to the circuit. The function includes a ring oscillator composed of a loop traversed by a signal. The loop is formed of N topologically identical chains of lags connected in series and an inversion gate, a chain of lags being composed of M delay elements connected in series. The function also includes a control module generating N control words being used to configure the value of the delays introduced by the chains of lags on the signal traversing them. A measurement module measures the frequency of the signal at the output of the last chain of lags after updating the control words, and the control module can deduce from the frequency measurements the bits making up the signature of the circuit. A method and a system for testing such circuits are also provided. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10833878-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9992031-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9590636-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2015092939-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11227046-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/FR-3106424-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10572651-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11281795-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2015207629-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-3851995-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2017078105-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9300470-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10915621-B2 |
| priorityDate |
2010-01-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |