http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8796680-B2
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5f32fed5a9423e70484d35004cefa5d8 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_2cf7e1cd4f808514eec9e776b284f5bb http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_099413ae0cf5a2b6398b5151766cd260 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5d245b69520496c33719520c7513e8ae |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-124 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1255 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7869 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1288 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1214 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-26 |
| filingDate | 2012-05-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2014-08-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1239b36963357a3086962cc12db4458c http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_cc54d8fc194a48b07042ccf14ce757bb http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1c1650c96e04156f662653af6d628ce1 |
| publicationDate | 2014-08-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | US-8796680-B2 |
| titleOfInvention | Thin-film transistor substrate and method of manufacturing the same |
| abstract | A thin-film transistor (TFT) substrate includes a semiconductor pattern, a conductive pattern, a first wiring pattern, an insulation pattern and a second wiring pattern. The semiconductor pattern is formed on a substrate. The conductive pattern is formed as a layer identical to the semiconductor pattern on the substrate. The first wiring pattern is formed on the semiconductor pattern. The first wiring pattern includes a source electrode and a drain electrode spaced apart from the source electrode. The insulation pattern is formed on the substrate having the first wiring pattern to cover the first wiring pattern. The second wiring pattern is formed on the insulation pattern. The second wiring pattern includes a gate electrode formed on the source and drain electrodes. Therefore, a TFT substrate is manufactured using two or three masks, so that manufacturing costs may be decreased. |
| priorityDate | 2007-10-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 34.