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publicationDate 2014-06-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-8754499-B1
titleOfInvention Semiconductor chip with power gating through silicon vias
abstract A semiconductor chip includes a semiconductor on insulator structure having a frontside and a backside. The chip includes a circuit in the semiconductor layer at the frontside. The circuit is isolated from a substrate. The chip includes a through silicon via (TSV) having a front-end, a back-end, and a lateral surface. The TSV is in the semiconductor layer and buried oxide layer and the front-end surface of the TSV is substantially parallel to the frontside of the semiconductor layer. An antifuse is deposited between the back-end of the TSV and the substrate. The antifuse insulates the TSV from the substrate. A ground layer is insulated from the semiconductor on insulator structure, and is coupled with the TSV and the circuit. The ground layer conducts a program voltage to the TSV to cause a portion the antifuse to migrate away from the TSV, thereby connecting the circuit to the ground.
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