| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_9ec030fc062b270c25327af9127bed3a
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0899213a520abbbac68d79901864a729 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-10253
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-09701
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-32225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-4857
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-73204
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-49827
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-15311
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-1461
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-15174
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-16225 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-147
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-49822
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-49894
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L28-40 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-02 |
| filingDate |
2011-01-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2014-04-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e1ec0c9d726a0d560364162e2b434354 |
| publicationDate |
2014-04-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-8686548-B2 |
| titleOfInvention |
Wiring substrate, method for manufacturing wiring substrate, and semiconductor package including wiring substrate |
| abstract |
A wiring substrate includes a ceramic substrate including plural ceramic layers, an inner wiring, and an electrode electrically connected to the inner wiring, the electrode exposed on a first surface of the ceramic substrate, and a silicon substrate body having a front surface and a back surface situated on an opposite side of the front surface and including a wiring pattern formed on the front surface and a via filling material having one end electrically connected to the wiring pattern and another end exposed at the back surface. The back surface is bonded to the first surface of the ceramic substrate via a polymer layer. The via filling material penetrates through the polymer layer and is directly bonded to the electrode. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10586759-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10347582-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10083909-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10283492-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10636780-B2 |
| priorityDate |
2010-01-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |