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filingDate 2008-11-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2014-03-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_42d24435d56577bfdcf0a38f585633f7
publicationDate 2014-03-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-8680580-B2
titleOfInvention Field effect transistor and process for manufacturing same
abstract A field effect transistor includes: a channel layer 103 containing GaN or InGaN; a first electron-supplying layer 104 disposed over the channel layer 103 and containing In x Al y Ga 1-x-y N (0≦x<1, 0<y<1, 0<x+y<1); a first etch stop layer 105 disposed over the first electron-supplying layer 104 and containing indium aluminum nitride (InAlN); and a second electron-supplying layer 106 provided over the first etch stop layer 105 and containing In a Al b Ga 1-a-b N (0≦a<1, 0<b<1, 0<a+b<1). A first recess 111 , which extends through the second electron-supplying layer 106 and the first etch stop layer 105 and having a bottom surface constituted of a section of the first electron-supplying layer 104 , is provided in the second electron-supplying layer 106 and the first etch stop layer 105 . A gate electrode 109 covers the bottom surface of the first recess 111 and is disposed in the first recess 111 . The second electron-supplying layer is provided so as to overlap with regions of an interface between the first electron-supplying layer 104 and the channel layer 106 except a region thereof under the bottom surface of the first recess 111 covering the gate electrode 109.
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priorityDate 2007-11-19-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 42.