Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_3f4e2b777b1453b4137c169269f40e87 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_cea8dbe61b43fd71e0c4025d95ea862d http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_3efae1572b54c08ba0eefac6438d740a http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e757fd4fedc4fe825bb81b1b466a0947 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_83642b0dba9a7d4644d28649a9612767 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1203 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1214 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-84 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-13 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-00 |
filingDate |
2012-03-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2014-01-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d414602f40c52631a96a0e0f7f344ca0 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c2695a803612b169f4a5370f41188827 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f98a92b5300299764075e747e6078b62 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_56b1e3229ab622af388a818d3213ad67 |
publicationDate |
2014-01-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-8629504-B2 |
titleOfInvention |
Extremely thin semiconductor-on-insulator (ETSOI) integrated circuit with on-chip resistors and method of forming the same |
abstract |
An electrical device is provided that in one embodiment includes a semiconductor-on-insulator (SOI) substrate having a semiconductor layer with a thickness of less than 10 nm. A semiconductor device having a raised source region and a raised drain region of a single crystal semiconductor material of a first conductivity is present on a first surface of the semiconductor layer. A resistor composed of the single crystal semiconductor material of the first conductivity is present on a second surface of the semiconductor layer. A method of forming the aforementioned electrical device is also provided. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2017358610-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10090332-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9947755-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10128343-B2 |
priorityDate |
2010-01-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |