| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6949193eb2caa37c0c87315348699a4a
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_cf62a2a04071febb7ee7f4498f19a683
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_8d38f5f96a9d8315c4a2381366e1d691
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_a3c5bdece57b6f62b713ddfa3e855294
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_38ed56a4b4e8e2315b2b3308bffedb3f
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1c7120cbea53423153fd6f9896589abb |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3065 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7834
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-165
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66636
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6659
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66628
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7848 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-76
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 |
| filingDate |
2010-06-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2013-10-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_dc9493b20ee0bac38125dac4cd5ad412
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_82c9c247a43627f8cbd65cb12cf3b3ea
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b663734d6042eb61082c2cf17877d9b3
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_04cddadbd0deb075f6840711ecba7754
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c577dada24f112419ea37f4c1be471ba |
| publicationDate |
2013-10-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-8558289-B2 |
| titleOfInvention |
Transistors having a composite strain structure, integrated circuits, and fabrication methods thereof |
| abstract |
A transistor includes a gate electrode disposed over a substrate. At least one composite strain structure is disposed adjacent to a channel below the gate electrode. The at least one composite strain structure includes a first strain region within the substrate. A second strain region is disposed over the first strain region. At least a portion of the second strain region is disposed within the substrate. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9627480-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2017141228-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9293537-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11658229-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9923082-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2019157425-A1 |
| priorityDate |
2009-07-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |