| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_58ec622509b850b0b26b5f171408f0bf
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_88bab0e9ec427c9ee689594eeb3582f1
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e757fd4fedc4fe825bb81b1b466a0947
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_47d277726b85539c6648851c74264577 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823842
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3105 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 |
| filingDate |
2009-11-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2013-09-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a6b2997c22c4149ebe42e165be3883fb
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8c0ab8c9e5e9522df2f5fdda7a3e2986
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_555d60475f7aebd48e441743017af7eb |
| publicationDate |
2013-09-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-8541275-B2 |
| titleOfInvention |
Single metal gate CMOS integration by intermixing polarity specific capping layers |
| abstract |
A method for forming a complementary metal oxide semiconductor device includes forming a first capping layer on a dielectric layer, blocking portions in the capping layer in regions where the capping layer is to be preserved using a block mask. Exposed portions of the first capping layer are intermixed with the dielectric layer to form a first intermixed layer. The block mask is removed. The first capping layer and the first intermixed layer are etched such that the first capping layer is removed to re-expose the dielectric layer in regions without removing the first intermixed layer. |
| priorityDate |
2009-11-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |