| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5b8a7f7f0ff6a519f385cd2fc8205a74
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1deaf546fce105a2f90614090c5aad2d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_9985d583b30ac1151ed99d3b3cbc1985
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_fece27a85662fa7c0bede1f20488cdc2
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_ce2ede4fbf2dac8210f8ec15e0875e72
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_cf5949d6615c5ee96516380e39d6677e |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F1-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F1-04 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F1-04 |
| filingDate |
2010-10-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2013-06-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_78788f7b0081a6c3882ef43cfc59c475
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c76e4a830f829f46d0de604155f6e4db
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_48a345745ff52f5a1c9bfe782b1ef12c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_63d869f82e9501b34d4df2b8f09894d0
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ede8d87f6aae09a0f5db1b942f7352ef |
| publicationDate |
2013-06-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-8464088-B1 |
| titleOfInvention |
Multiple channel bonding in a high speed clock network |
| abstract |
Various methods and structures related to clock distribution for flexible channel bonding are disclosed. One embodiment provides a clock network in physical media attachment (“PMA”) circuitry, a specific type or portion of system interconnect circuitry, arranged in pairs of channel groups. In one embodiment, clock generation circuitry blocks (“CGBs”) in each pair of channel groups receives outputs of multiple phased locked loop circuits (“PLLs”) which can be selectively utilized by the CGBs to generate PMA clock signals. In another embodiment, the CGBs can also select output of a clock data recovery (“CDR”)/transmit PLL circuitry block in one of the channels of a channel group of the pair of channel groups. In one embodiment, first groups of connection lines couple circuitry in a channel group pair such that a designated CGB in each channel group pair can provide clock signals to one or more of the channels in the channel group pair. In one embodiment, second groups of connection lines connect channels in one channel group pair to channels in other channel group pairs such that one or more channels across the channel group pairs can receive a clock signal generated by a CGB in a designated channel. These and other embodiments are described more fully in the disclosure. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10790827-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11700002-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2019131975-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2015091623-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11342918-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9041432-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10439615-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8700825-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2019149154-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8812755-B2 |
| priorityDate |
2010-10-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |