http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8392690-B2

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_90914d022e26d803e88bec7fd6a5e4e7
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c7a3468057b3044a011cd2ac9deaa17b
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_19224ca86c3e930542c4cbd8aac29202
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_2485cf828913a948d6214f57f578ee55
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_706e512815a9c2deacc8fcff2f00349d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_4568f924237a75b294e9d66abc70a816
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-0246
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F12-00
filingDate 2007-12-20-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2013-03-05-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_225be4876e091211eb91712fc6e4ef23
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d69a0fa5c83f42a3a5adec59a35ab26d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_344a8f93cb568a77e4905a4dc94e7262
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_854019a3567281a548d5806547d2fc91
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_604aa7d6c96082d340eb8ff69426d2a8
publicationDate 2013-03-05-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-8392690-B2
titleOfInvention Management method for reducing utilization rate of random access memory (RAM) used in flash memory
abstract A management method for reducing the utilization rate of random access memory (RAM) while reading data from or writing data to the flash memory is disclosed. A physical memory set is constructed from a plurality of physical memory blocks in the flash memory. A logical set is constructed from a plurality of logical blocks wherein the data stored in the logical set are stored in the physical memory set. Further, the data stored in each of the logical blocks are stored in one number of physical memory blocks. A mapping table is constructed and includes a hash function, a logical set table, a physical memory set table, and a set status table for managing the relationship among the physical memory sets, physical memory blocks, and logical blocks while reading data from or writing data to the flash memory. Further, the management method operates and maintains the physical memory sets, the physical memory blocks, and the logical blocks at a set level so that the utilization rate of random access memory is reduced to decrease the access capacity of the random access memory while operating the physical memory blocks and the logical blocks of the flash memory.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10656837-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11144446-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10606760-B2
priorityDate 2006-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

Predicate Subject
isDiscussedBy http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID43043
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID415725313

Total number of triples: 26.