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filingDate 2010-06-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2012-12-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 2012-12-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-8327229-B2
titleOfInvention Data memory system
abstract A data memory system is provided which includes a nonvolatile memory cell array, an error correction code generation circuit, an error correction code decoding circuit, and a first circuit. The nonvolatile memory cell array includes a plurality of memory cells which store digital data each having at least a value of “1” or “0” as a charge of a charge accumulation layer included in each memory cell, and use a difference between charges of the accumulation layer as a writing bit or an erasing bit. The nonvolatile memory cell array erases memory cells in units of pages, each page being formed of adjacent memory cells included in the plurality of memory cells.
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