http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8179357-B2

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http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b51e41645facdd9420587214945b99f3
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-36
filingDate 2007-11-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2012-05-15-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5fa6cfa6fbcbfb8d4828932f9c05fa55
publicationDate 2012-05-15-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-8179357-B2
titleOfInvention Semiconductor circuit, scanning circuit and display device using these circuits
abstract In a semiconductor circuit a floating node is set to any voltage by utilizing a control signal applied to a refresh terminal and has a period shorter than that of a clock signal. The circuit includes first and second transistors connected between a first clock terminal and first power supply terminal, third and fourth transistors connected between the refresh terminal and the first power supply terminal, and fifth and sixth transistors connected between a second power supply terminal and the first power supply. Gates of the fourth and fifth transistors are connected to an input terminal, a gate of the third transistor is connected to a second clock terminal, a gate of the first transistor is connected to a node between the fifth and sixth transistors, gates of the second and sixth transistors are connected, and a node between the first and second transistors is connected to an output terminal.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11348653-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2009121980-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8432380-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9048117-B2
priorityDate 2006-11-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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