http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8153519-B1

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filingDate 2010-12-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2012-04-10-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_30b8cfdecb51bc7891bce684f70bfa1e
publicationDate 2012-04-10-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-8153519-B1
titleOfInvention Method for fabricating semiconductor device using spacer patterning
abstract A method for fabricating a semiconductor device includes depositing and stacking a hard mask layer and a sacrificial layer over an etch target layer forming a mask pattern with holes defined therein over the sacrificial layer, forming first pillars filling the holes; removing the mask pattern, forming second pillars by using the first pillars as an etch barrier and etching the sacrificial layer, forming spacers surrounding sidewalls of each second pillar, removing the second pillars, etching the hard mask layer by using the spacers as etch barriers to form a hard mask pattern, and forming a hole pattern by using the hard mask pattern as an etch barrier and etching the etch target layer.
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priorityDate 2010-11-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 40.