| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_4e2b69dd959f5d79c59fef49bc2918e0
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_32946980079295d5ab8f7431a9cf4bf3
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5a3ce8a60e91538931ea007e7f522e03
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_33cf281df1fdf76b7da1bb88a75ba80d |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1292
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1248
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K10-466 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78669
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1214
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K10-476
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66765
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-458
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K10-466
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4908 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-00 |
| filingDate |
2010-01-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2012-03-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_07492b5403f5b58898bf79544f2d471c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_229d5422342c560140691d0d28f89e11
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_481d1008ad7bf40cc5f12e76cf10f795 |
| publicationDate |
2012-03-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-8129233-B2 |
| titleOfInvention |
Method for fabricating thin film transistor |
| abstract |
A method for fabricating a thin film transistor (TFT) on a substrate includes forming a gate electrode; forming a semiconductor layer being insulated from the gate electrode and partially overlapped with the gate electrode; sequentially forming first and second gate insulating layers between the gate electrode and the semiconductor layer, wherein the first gate insulating layer is formed of a material different from the second gate insulating layer and at least one of the first and second gate insulating layers includes a sol-compound; and forming source and drain electrodes at both sides of the semiconductor layer. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8901561-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11594555-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10692894-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10978490-B2 |
| priorityDate |
2006-06-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |