http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8125824-B1

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grantDate 2012-02-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_944554ca50e7f74742b7b1f9725b5e18
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publicationDate 2012-02-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-8125824-B1
titleOfInvention Nanotube random access memory (NRAM) and transistor integration
abstract A nanotube random access memory (NRAM) structure is provided. The structure includes a substrate, a gate electrode disposed in the substrate, and a first nanotube fabric disposed on the substrate. The first nanotube fabric has a channel region spaced apart from the gate electrode by a portion of the substrate. The structure also includes a drain contact contacting the first nanotube fabric. The structure also includes a second nanotube fabric disposed on the substrate, and is adjacent and connected to the first nanotube fabric. The structure also includes a source contact contacting the second nanotube fabric. The first nanotube fabric is a high-voltage fabric compared to the second nanotube fabric such that when a voltage is applied across the first nanotube fabric and the second nanotube fabric via the drain contact and the source contact, the second nanotube fabric is permitted to switch without switching the first nanotube fabric.
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