http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8045379-B2
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_fdad00677b9268c26e005a9e03a7b9dd |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76834 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7843 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823807 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823864 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-04 |
| filingDate | 2008-08-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2011-10-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2c28b09be5d04562621291b739a43ef7 |
| publicationDate | 2011-10-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | US-8045379-B2 |
| titleOfInvention | Semiconductor device that is advantageous in operational environment at high temperatures |
| abstract | A semiconductor device includes an N-type insulated-gate field-effect transistor including a first insulating layer that is provided along side walls of a gate electrode, has a negative thermal expansion coefficient, and applies a tensile stress to a channel region of the N-type insulated-gate field-effect transistor. The device also includes a P-type insulated-gate field-effect transistor including a second insulating layer that is provided along side walls of a gate electrode, has a positive thermal expansion coefficient, and applies a compression stress to a channel region of the P-type insulated-gate field-effect transistor. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9654876-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2015264482-A1 |
| priorityDate | 2005-08-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 34.