| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e757fd4fedc4fe825bb81b1b466a0947 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-1027 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F13-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F9-3861
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F9-3834
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F9-30032
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-0815 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F12-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F13-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F13-28 |
| filingDate |
2008-02-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2011-04-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3df52f6f06f84589b74c1b8c34a213ae
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_124c289f5d27263eeb3378d48fc29c2e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_059e8d3169f07e16a4c86545643a2a72
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a450d30591dcc3664becd8a54fe3ac0a
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_95a25992b8ab74eebbeec85827a530de |
| publicationDate |
2011-04-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-7930504-B2 |
| titleOfInvention |
Handling of address conflicts during asynchronous memory move operations |
| abstract |
A method within a data processing system in which a processor handles conflicts, which occur during performance by an asynchronous memory mover of an asynchronous memory move (AMM) operation. The asynchronous memory mover performs an asynchronous memory move (AMM) operation by which the actual data is moved from a source to a destination memory location, independent of the processor. The memory mover sets a flag bit to indicate that the asynchronous memory mover is currently performing an AMM operation at the memory. When the processor receives a memory access operation, the processor checks the value of the flag bit before issuing the new memory access operation, and checks the associated address of the AMM operation to determine possible address conflicts. The processor then evaluates and responds to address conflicts to prevent corruption of data during an AMM operation. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10613792-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8356151-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10241945-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8275963-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10152322-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10572179-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2009198937-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2009198936-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2009198955-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9996298-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2009198939-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10140052-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10126952-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8245004-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8327101-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2009198934-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2009198897-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8095758-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10346164-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10042580-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10599569-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10067713-B2 |
| priorityDate |
2008-02-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |