Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c16d2144a81bfa32a665dca1e93c3d37 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02271 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31604 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-022 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3141 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31616 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-40117 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-40114 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02181 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02178 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0228 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3145 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3142 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-4763 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3205 |
filingDate |
2008-11-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2010-09-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ccc3056b0342964967137ef70af02ed6 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ed82b4aac71cff8042003d0f1ff2e10e http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_283c86e2b710f93a82dcbfb422cbab0f http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3a346b0ffdc2f5329eddb3bb461886e4 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e5df5a92426a0f816c309800a2d156d1 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c535ad4080bbce73e0524a944ea7c7e9 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b12cc3c9a5aa84631bfe155af150e82e http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0c9b3a1885337982d6a1063c882ef02e |
publicationDate |
2010-09-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-7790591-B2 |
titleOfInvention |
Methods of manufacturing semiconductor devices including metal oxide layers |
abstract |
Methods of manufacturing a semiconductor device are provided including forming a charge storage layer on a gate insulating layer that is on a semiconductor substrate. A blocking insulating layer is formed on the charge storage layer and an electrode layer is formed on the blocking insulating layer. The blocking insulating layer may be formed by forming a lower metal oxide layer at a first temperature and forming an upper metal oxide layer on the lower metal oxide layer at a second temperature, lower than the first temperature. |
priorityDate |
2007-11-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |