http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7732232-B2
Outgoing Links
Predicate | Object |
---|---|
assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_aa71446ea1d149f3170dfb82b0af4102 |
classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02P70-50 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K50-805 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K59-86 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02E10-541 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K59-805 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-0465 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-03925 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-18 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-0749 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-046 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-03928 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-0392 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-00 |
filingDate | 2007-10-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2010-06-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_84e660b38f46006344a39d18884541f6 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a1e890ab810adfe0dc8ebffc4fd08edb http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2e3c61ffbfc8261a8b4a011f24accf5f http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b916cfb2ce3c8feb52f2abb463acf989 |
publicationDate | 2010-06-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | US-7732232-B2 |
titleOfInvention | Series interconnected optoelectronic device module assembly |
abstract | Series interconnection of optoelectronic device modules is disclosed. Each device module includes an active layer disposed between a bottom electrode and a transparent conducting layer. An insulating layer is disposed between the bottom electrode of a first device module and a backside top electrode of the first device module. One or more vias are formed through the active layer, transparent conducting layer and insulating layer of the first device module. Sidewalls of the vias are coated with an insulating material such that a channel is formed through the insulating material to the backside top electrode of the first device module. The channel is at least partially filled with an electrically conductive material to form a plug that makes electrical contact between the transparent conducting layer and the backside top electrode of the first device module. Portions of the backside top electrode and insulating layer of a second device module are cut back to expose a portion of the bottom electrode of the second device module. The first and second device modules are attached to an insulating carrier substrate. Electrical contact is made between the backside top electrode of the first device module and the exposed portion of the bottom electrode of the second device module. |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-D667371-S http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9401438-B2 |
priorityDate | 2005-01-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 57.