Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_9985d583b30ac1151ed99d3b3cbc1985 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-1736 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-173 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-17728 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F7-38 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L25-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-094 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-177 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-173 |
filingDate |
2006-07-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2010-04-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f54f3f0b25c8985395ffeee7d3bcf64b http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3b0dc12f06e49063148d470aec9e7b7e http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7f840a2e63fe6ce7f79bf0102130acdb http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f4efacdd5847ab4ba54bfd217ef7adc2 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0e458418d290ae6aa4f9ee19f546b8c8 |
publicationDate |
2010-04-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-7705628-B1 |
titleOfInvention |
Programmable logic device having logic elements with dedicated hardware to configure look up tables as registers |
abstract |
A programmable logic device architecture having logic elements with dedicated hardware to configure the look up tables of the logic element to either perform logic functions or to operate as a register for pipelining or other purposes. The programmable logic device includes a general interconnect and a plurality of logic array blocks interconnected by the general interconnect. Each of the plurality of logic blocks further includes one or more logic elements. The logic elements each include a first look up table, a second look up table, and dedicated hardware within the logic element to configure the first look table and the second look up table as a register without having to use the general interconnect. In one embodiment, the dedicated hardware includes a plurality of dedicated interconnects within the logic element to configure the two look up tables as a pair of cross coupled muxes or latches when configured as a register. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-113986815-B http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10418995-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8601424-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8860458-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10305486-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9172378-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2023018646-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-114859218-B http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-114859218-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10148271-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-113986815-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-103259528-A |
priorityDate |
2006-03-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |