| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_80787665b837ed3eb503bbcd27c0043a |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-136213 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-1368
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78618
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-1362
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78669
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78696 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1343
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09F9-30
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1339
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1368
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1362
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09F9-35 |
| filingDate |
2008-06-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2009-08-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a7bfe7a591660fac79739521cd56c097
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_dabd27be9a7f00af37c16d6bb523b7eb
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_08a7305f6a6f4fd45fde18896716642d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5358acc4b136ba98dc5f6366e374ffe0
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_af29ce9f632800ba680f0ea61ea160dd |
| publicationDate |
2009-08-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-7576828-B2 |
| titleOfInvention |
Liquid crystal display device with spacer facing capacitance electrode |
| abstract |
A liquid crystal display device comprises a pair of substrates which are arranged to face each other in an opposed manner while sandwiching liquid crystal therebetween, pixel regions which are formed on a liquid-crystal-side surface of one substrate out of the pair of substrates, and thin film transistors which are formed on respective pixel regions, wherein each thin film transistor includes a gate electrode connected to a gate signal line, a semiconductor layer laminated to the gate electrode by way of an insulation film, a drain electrode formed on the semiconductor layer and connected to a drain signal line, and a source electrode connected to a pixel electrode, and the semiconductor layer is formed in a periodically irregular shape in a zone having a width substantially larger than a width of the source electrode on a side thereof from which at least the source electrode is pulled out. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9161131-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2011235833-A1 |
| priorityDate |
2001-08-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |