Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f1412fc16b28b815d74b5f7fbbcc4f7b |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14683 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-26 |
filingDate |
2005-09-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2009-03-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6944d25ff4ec3b269294c5fc17431be8 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bc849a90f655db98d95b969254a2a412 |
publicationDate |
2009-03-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-7498181-B2 |
titleOfInvention |
Method of preparing an integrated circuit die for imaging |
abstract |
Integrated circuit dies are prepared for imaging by completely etching away all metal from the metal lines without removing barrier layers that underlie the metal lines. The metal vias may also be removed, especially if they are formed from the same metal as the metal lines, as in copper damascene circuits. This provides high contrast images that permits circuit layout extraction software to readily distinguish between metal lines and vias. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008160654-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9754817-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8058081-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9379003-B2 |
priorityDate |
2005-09-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |