http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7398487-B1
Outgoing Links
Predicate | Object |
---|---|
assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_70ca3ea7752cc2ae9b2687d93d702a99 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F30-34 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F17-50 |
filingDate | 2005-08-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2008-07-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b7ad12dfa26986384de3c1d5841a5ff9 |
publicationDate | 2008-07-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | US-7398487-B1 |
titleOfInvention | Programmable logic device-structured application specific integrated circuit |
abstract | A method and apparatus for a CPLD-structured ASIC. Circuit blocks associated with a programmed portion of a CPLD are configured to preserve timing associated with instantiation of a circuit design in the programmed portion of the CPLD. The circuit blocks have predetermined placement information obtained from the CPLD, and the placement information is used to locate CPLD-structured ASIC cells associated with the circuit blocks. |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008219037-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8892806-B2 |
priorityDate | 2005-08-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 33.