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filingDate 2005-08-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2008-07-08-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b7ad12dfa26986384de3c1d5841a5ff9
publicationDate 2008-07-08-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-7398487-B1
titleOfInvention Programmable logic device-structured application specific integrated circuit
abstract A method and apparatus for a CPLD-structured ASIC. Circuit blocks associated with a programmed portion of a CPLD are configured to preserve timing associated with instantiation of a circuit design in the programmed portion of the CPLD. The circuit blocks have predetermined placement information obtained from the CPLD, and the placement information is used to locate CPLD-structured ASIC cells associated with the circuit blocks.
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