| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0e433c1625fc509a087c912b440da84b |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S438-905 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76865
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-2855
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76843 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-4763 |
| filingDate |
2005-05-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2008-02-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_84a864fbb2a7858997dbacda9798b1d6
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fd7a85aaa25df58e6265275f22978f3a
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a709b9630347a119df7747c64502aff8 |
| publicationDate |
2008-02-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-7332425-B2 |
| titleOfInvention |
Simultaneous deposition and etch process for barrier layer formation in microelectronic device interconnects |
| abstract |
The present invention provides a method of forming a interconnect barrier layer 100 . In the method, physical vapor deposition of barrier material 200 is performed within an opening 140 located in a dielectric layer 135 of a substrate 110 . RF plasma etching of the barrier material 200 that is deposited in the opening 140 occurs simultaneously with conducting the physical vapor deposition of the barrier material 200. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10780498-B2 |
| priorityDate |
2005-05-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |